SANTA CLARA, Calif. AMD (NASDAQ: AMD) today announced the AMD Versal Premium Series Gen 2,an adaptive SoC platform designed to deliver the highest levels of system acceleration for a wide range of workloads.Versal Premium Series Gen 2 will be the FPGA industry’s first devices featuring Compute Express Link (CXL®)3.1 and PCIe® Gen6 as well asLPDDR5Xmemory support in hard IP.
These next-generation interface and memory technologies access
and move data rapidly and efficiently between
processors and accelerators. CXL 3.1 and LPDDR5X help unlock more memory
resources faster to address the growing real-time processing and storage demands
of data-intensive applications in data center, communications, test and
measurement, and aerospace and defense markets.
“System architects are constantly looking to pack more data into smaller spaces and move data more efficiently between parts of the system,” said Salil Raje, senior vice president and general manager, Adaptive and Embedded Computing Group, AMD. “Ourlatest addition to the Versal Gen 2portfoliohelpscustomers improve overall system throughput and utilization of memory resources to achieve the highest performance and unlock insightsfor their most demanding applications from the cloud to the edge.
Accelerate Host Connectivity
AMD champions open innovation through its
support of CXL, an open industry-standard interconnect between processors and
devices such as FPGA-based accelerators.With support for CXL 3.1 and PCIe Gen6,the
industry’s fastest host interfaces,2Versal Premium Gen 2 devices enable
industry-leading, high-bandwidth host CPU-to-accelerator connectivity.PCIe Gen6
offers a 2-4X faster line rate compared to competing FPGAs with PCIe Gen4 or
Gen5 support,2 while CXL3.1 running PCIe Gen6 provides double the bandwidth
of competing devices with CXL 2.13 at similar latencies, as well as
enhanced fabric and coherency capabilities.
Additionally, by pairing Versal Premium Series Gen 2 with an AMD EPYC™ CPUs, system architects can leverage the latest AMD FPGA-baseddevice connected via CXL or PCIe to a high-performance CPU, toaccelerate data-intensive applications and meet rapid data growth demands.CXL also brings an additional benefit of memory coherency to help enable true heterogeneous, accelerated computing.
Increasing Memory Bandwidth and Utilization
AMD Versal Premium Series Gen 2adaptive
SoCsaccelerate memory bandwidth for faster data transfers and real-time responsivenesswith the fastest LPDDR5X memory
connectivity available, at up to 8533 Mb/s.This ultra-fast, enhanced DDR memory
enablesup to 2.7Xfaster host connectivity over comparable competitive devices
with LPDDR4/5 memory.4
Connectivity
to CXL memory expansion modules enable up to 2.7X more total bandwidththan
LPDDR5X memory alone.5As a result, the Versal
Premium Series Gen 2allows for scalable memory pooling and extension for
multiple accelerators, optimizing memory utilization and increasing bandwidth
and capacity.
By dynamically allocating a memory poolfor multiple devices, Versal Premium Series Gen 2 adaptive SoCs aredesigned to improve memory utilizationin a Multi-Headed Single Logic Device (MH-SLD), allowing it to operate without a fabric or switch,while supporting up to two CXL hosts.
Strengthen Data Security
Enhanced
security features help the Versal Premium Series Gen 2transfer data quickly and
securely,both in transit and at rest. It is the industry’s first FPGA deviceto feature
support for integratedPCIe® Integrity and Data Encryption (IDE)in hard IP.6
Inline encryption built into hard DDR memory controllers helps secure data at
rest,while400G High-Speed Crypto Engines help the device secure userdata at up
to 2Xfaster line rates, enabling faster secure data transactions.7
AMD
Versal Premium Series Gen 2 development tools are expected to be available in
Q2 2025, followed bythe availability of silicon samplesby early 2026. Production
shipments are expected to begin in the second halfof 2026.
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